1. Field of the Invention
The present invention relates to an automatic-gain control circuit, and more particularly, to an automatic-gain control circuit capable of controlling the gain using a variable current source.
2. Description of the Prior Art
In a modernized society, various paper, data, information and video/audio signals can be processed and transmitted as electronic signals. Therefore, signal-processing circuits capable of processing electronic signals have become very important. In order to efficiently process electronic signals in a data system, many gain-amplifying circuits are required for maintaining the amplitude of the electronic signals adequately. A gain-amplifying circuit is an amplifier capable of enlarging an input signal, outputting the enlarged input signal and adjusting the amount of gain based on a control signal. Among various gain-amplifying circuits, a variable gain-amplifying circuit capable of adjusting the amplitude of the electronic signals adequately is often designed as an automatic-gain control (AGC) circuit in order to adjust the amplitude of the electronic signals automatically.
Since the gain of a variable gain-amplifying circuit can be controlled by a control signal, the variable gain characteristics of the variable gain-amplifying circuit can be represented by how the gain varies with the control signal. Generally speaking, it is preferable to design a variable gain-amplifying circuit having a wider amplifying range, better control characteristics (such as high linearity), and higher resistance against characteristic shifts due to process or temperature variations. A variable gain-amplifying circuit having a wider amplifying range can adjust its gain to a larger degree, provide electronic signals with more distinct amplitudes, and thus can be used in more applications. A variable gain-amplifying circuit having better control characteristics can be controlled more accurately. In a variable gain-amplifying circuit having higher resistance against characteristic shifts due to process or temperature variations, external influences on the variable gain characteristics can be reduced, and the overall performance of the system can be improved.
Reference is made to FIG. 1 for a diagram of a prior art AGC circuit 10. The AGC circuit 10 includes a variable-gain amplifier (VGA) 12, a peak-detecting circuit 14, a constant charge/discharge circuit 16, and a digital-to-analog converter (DAC) 1 8. The VGA 12 receives an input signal VIN at an input end and adjusts the input signal VIN based on a gain-factor control signal VCTL, thereby generating a corresponding output signal VOUT at an output end. In the prior art AGC circuit 10, the gain-factor control signal VCTL is generated by the peak-detecting circuit 14 and the constant charge/discharge circuit 16 based on the output signal VOUT. Therefore, automatic-gain control can be performed in a feedback mechanism.
In the prior art AGC circuit 10, the gain-factor control signal VCTL can be varied when the DAC 18 outputs different threshold signals VT′, and the gain of the VGA 12 can be adjusted accordingly. The peak-detecting circuit 14 includes a positive-phase differential comparator 21, negative-phase differential comparator 22, and an OR gate 23. The positive-phase differential comparator 21 includes a positive input end coupled to the VGA 12 for receiving the output signal VOUT and an negative input end coupled to the DAC 18 for receiving the threshold signal VT′. The positive-phase differential comparator 21 can differentially compare the output signal VOUT with the threshold signal VT′, thereby generate a corresponding positive-phase comparing signal V+ at its output end. The negative-phase differential comparator 22 includes a positive input end coupled to the DAC 18 for receiving the threshold signal VT′ and a negative input end coupled to the VGA 12 for receiving the output signal VOUT. The negative-phase differential comparator 22 can differentially compare the output signal VOUT with the threshold signal VT′, thereby generate a corresponding negative-phase comparing signal V− at its output end. The OR gate 23, coupled between the output ends of the positive-phase differential comparator 21 and the negative-phase differential comparator 22, can generate a corresponding comparing signal VGATE based on the positive-phase comparing signal V+ and the negative-phase comparing signal V−.
The constant charge/discharge circuit 16 includes a capacitor C, a constant charge current source IP, a constant discharge current source IN, a charge switch SWP, and a discharge switch SWN. The charge switch SWP can include a P-type metal oxide semiconductor (PMOS) transistor, and the discharge switch SWN can include an N-type metal oxide semiconductor (NMOS) transistor. The gates of the charge switch SWP and the discharge switch SWN are coupled to the OR gate 23. When the comparing signal VGATE has a high voltage level, the charge switch SWP is turned off (open-circuited) and the discharge switch SWN is turned on (short-circuited). Therefore, the constant charge/discharge circuit 16 can discharge the capacitor C using the constant discharge current source IN and the discharge switch SWN. When the comparing signal VGATE has a low voltage level, the charge switch SWP is turned on and the discharge switch SWN is turned off. Therefore, the constant charge/discharge circuit 16 can charge the capacitor C using the constant charge current source IP and the charge switch SWP. In the prior art AGC circuit 10, the constant charge current source IP and the constant discharge current source IN provide constant charging and discharge currents, respectively.
Reference is made to FIG. 2 for a signal diagram illustrating the operation of the prior art AGC circuit 10. In FIG. 2, the waveform of the output signal VOUT is represented by a sine wave having an amplitude VM and a central level VREF. The transverse axle represents time, and a period (0˜2π) is depicted in FIG. 2. When the absolute value of the output signal VOUT is smaller than that of the threshold signal VT′, the constant charge/discharge circuit 16 performs charging operation, such as during the time periods 0˜θ, (π−θ)˜(π+θ) and (2π−θ)˜2π (as illustrated by diagonal regions of the sine wave in FIG. 2). When the absolute value of the output signal VOUT is larger than that of the threshold signal VT′, the constant charge/discharge circuit 16 performs discharging operation, such as during the time periods θ˜(π−θ) and (π+θ)˜(2π−θ) (as illustrated by blank regions of the sine wave in FIG. 2). The value of θ depends on the level of the threshold voltage VT′. As the absolute value of the threshold voltage VT′ increases, the charging time TP(TP=4θ) of the constant charge/discharge circuit 16 becomes longer. As the absolute value of the threshold voltage VT′ decreases, the discharging time TN(TN=2π−4θ) of the constant charge/discharge circuit 16 becomes longer.
When the AGC circuit 10 performs charging and discharging operations, corresponding charging electronic charges QP and discharging electronic charges QN can be represented by the following formulae:QP=IPTP=IP(4θ)QN=INTN=IN(2π−4θ)
When the AGC circuit 10 is stabilized, the charging electronic charges QP and the discharging electronic charges QN reach an equilibrium state. Therefore, the following relationships can be obtained:QP=QN IN/IP=2θ/(π−274 )
If N is used for representing the value of IN/IP, the value of θ can be represented by the following formula:
  θ  =            π      2        ×          N              N        +        1            
Also, the relationship between the amplitude VM of the output signal VOUT and the threshold signal VT′ can be represented by the following formula:VM sin θ=VT′
As a result, the following relationships can be obtained:
      V    M    =                              V          T          ′                /        sin            ⁢                          ⁢      θ        =                  V        T        ′            /              sin        ⁡                  (                                    π              2                        ×                          N                              N                +                1                                              )                    
In order for the AGC circuit 10 to have better control characteristics, the value of the threshold signal VT′ has to be close to the target amplitude VM of the output signal VOUT, so that the amplitude VM of the output signal VOUT can be varied by adjusting the threshold signal VT′. Therefore, in order to reduce the difference between the absolute values of VT′ and VM, it is preferable when the value of θ approaches π/2 and the value of N approaches infinity. In the prior art AGC circuit 10, N is normally set to a constant value (such as N=10). The AGC circuit 10 can have better control characteristics as the target amplitude VM of the output signal VOUT is varied by adjusting the threshold signal VT′.
Since the threshold signal VT′ is close to the target amplitude VM of the output signal VOUT in the prior art AGC circuit 10, a high-speed positive-phase differential comparator 21 and a high-speed negative-phase differential comparator 22 are required for determining the difference between the threshold signal VT′ and the output signal VOUT accurately, so that the AGC circuit 10 can switch between charging/discharging operations correctly. Also, the DAC 18 for providing the threshold signal VT′ occupies large circuit space in the prior art AGC circuit 10 and consumes more power.